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Engineering

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    • Robot Who Helps Save Lives

      "The new Disney movie WALL-E features robots of the future actively helping humans. But the future is now. This ScienCentral News video reports on a real robot that could help us take care of elderly relatives from miles away."

      I think this awesome how we are progressing the robotronic field can't wait till we actually do have these things in our home. I am all for making life alot easier for the human race. especailly for the elderly.
      "The new Disney movie WALL-E features robots of the future actively helping humans. But the future is now. This ScienCentral News vide... more

      Dresden8605

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      3 days ago
    • Next-generation DSP design

      DSP Builder Version 8.0 features second-generation timing-driven Simulink synthesis targeting high-performance digital signal processing (DSP) designs, Altera Corporation announced its DSP Builder tool version 8.0, featuring second-generation model-based synthesis technology. This technology allows DSP designers for the first time to automatically generate timing-optimized RTL code based on high-level Simulink design descriptions. With this new DSP Builder feature, designers can achieve high-performance design implementations, running at near-peak FPGA performance, in a matter of minutes. This is a significant productivity savings compared to the hours, if not days, required to hand-optimize HDL code.

      “DSP Builder’s second-generation model-based synthesis technology allows customers to use Simulink as the modeling, simulation and implementation environment of choice for high-performance DSP designs,” said Ken Karnofsky, marketing director for signal processing and communications at The MathWorks. “This technology allows designers to vastly improve their productivity as they implement DSP functionality on Altera’s FPGAs.”

      Designing multi-channel signal processing datapaths in applications such as multi-carrier, multi-antenna RF processing in wireless basestations, the new DSP Builder second-generation synthesis technology delivers dramatic productivity gains. The DSP Builder tool automatically adds pipelined stages and registers, and implements time division multiplexing to generate highly optimized designs for functions such as digital upconversion (DUC), downcoversion (DDC), crest factor reduction (CFR) and digital predistortion (DPD). This greatly enhances productivity and enables users to perform system level design exploration rapidly, and to easily scale their design for varying carrier bandwidths, number of carriers, antennas, and sectors. DSP Builder version 8.0 includes design examples for multi-antenna, multi-carrier WiMAX and WCDMA DUC and DDC designs.

      “Altera continues to set the standard for FPGA design productivity, including high-performance DSP designs,” said Chris Balough, marketing director for software, embedded, and DSP at Altera. “The innovative synthesis technology included in DSP Builder version 8.0 delivers a timing-driven FPGA implementation environment that allows designers to get the system performance they require with the push of a button—enabling an order-of-magnitude productivity gain.”

      DSP Builder is the leading synthesis technology for implementing Simulink designs in a high-performance FPGA platform quickly and effortlessly. Altera’s DSP Builder reads Simulink model files (.mdl) that are built using DSP Builder/MegaCore® blocks and generates VHDL files and tool command language (Tcl) scripts for synthesis, hardware implementation and simulation. This technology shortens DSP design cycles by creating the hardware representation of a DSP design in an algorithm-friendly development environment.
      DSP Builder Version 8.0 features second-generation timing-driven Simulink synthesis targeting high-performance digital signal processi... more

      smorrisey

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      19 hours ago
    • Embedded hardware design for dummies

      By taking advantage of the latest 16-bit MCUs that offer flexible I/O pin mapping, designers can conceive efficient embedded designs by taking the modular plug-in approach.

      Utilizing modularity in an embedded design opens up a number of new possibilities when compared to standard embedded applications. It enables the design of compact form-factor devices, without sacrificing functionality. Modularized embedded designs can be designed economically, because they can be tailored to the application—avoiding unnecessary functionality and cost. They’re also production-friendly, since they open up new diagnostic possibilities without requiring excessive additional resources on the device itself.

      We can better understand this modularity by examining an embedded system comprising multiple modular extensions that perform unique tasks. The main controller can be programmed to act as a host that’s capable of recognizing and controlling a number of individual, modular plug-in cards. These cards then can perform a number of different functions, from sensing to communications.

      In generic terms, a standalone embedded-system design comprises some of the following components: a computing block, a sensor block, a display element, a user interface, and some storage and connectivity options. Based on these function blocks, we can imagine a sample application where one or many of them are implemented modularly. To strike a balance between computing power and cost, a good host controller would be something like a 16- or 32-bit MCU.

      Designers have yet another option to handle the tangled I/O line problem. They can cluster the required I/O lines and implement the peripherals in software— SPI or UART functions can be bit-banged through I/O pins. This avoids the higher system costs from either the usage of a high-pin-count MCU or extra devices. Beware, though—when these peripheral functions are mimicked in software, the MCU performance may degrade or the design may dissipate more power due to faster CPU operation. As a result, you can still end up with a costly, complicated design.

      Depending on the application (type of card inserted and detected), bootloading the code into the MCU can work well. This is accomplished by putting a small amount of flash memory, which has the new code, on the plug-in module itself or on a separate loader card. Other applications will require all or most of the cardhandling code to be already present in the MCU. This will allow for the smallest and cheapest possible plug-in cards, at the cost of using more flash memory on the MCU.
      By taking advantage of the latest 16-bit MCUs that offer flexible I/O pin mapping, designers can conceive efficient embedded designs b... more

      smorrisey

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      3 days ago
    • RF/Microwave technologies advance for military systems

      From the device level through signal sources and integrated assemblies, suppliers of RF/microwave components continue to contribute to advances in military electronic systems.

      Military electronics systems generally leverage the latest technologies in order to achieve performance or even tactical advantages. Although systems, such as radar and electronicwarfare (EW) platforms, are comprehensive collections of analog, digital, and RF circuits and devices, it is often the technology in a part as small as a transistor that can have an enormous impact on the overall performance of a military electronics system.
      From the device level through signal sources and integrated assemblies, suppliers of RF/microwave components continue to contribute to... more

      smorrisey

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      3 days ago
    • Top 5 benefits of FPGA technology

      Field-programmable gate array (FPGA) technology continues to gain momentum, and the worldwide FPGA market is expected to grow from $1.9 billion in 2005 to $2.75 billion by 20101. Since its invention by Xilinx in 1984, FPGAs have gone from being simple glue logic chips to actually replacing custom application-specific integrated circuits (ASICs) and processors for signal processing and control applications. Why has this technology been so successful? This article provides an introduction to FPGAs and highlights some of the benefits that make FPGAs unique.

      Top Five Benefits:

      1. Performance
      2. Time to Market
      3. Cost
      4. Reliability
      5. Long-Term Maintenance

      At the highest level, FPGAs are reprogrammable silicon chips. Using prebuilt logic blocks and programmable routing resources, you can configure these chips to implement custom hardware functionality without ever having to pick up a breadboard or soldering iron. You develop digital computing tasks in software and compile them down to a configuration file or bitstream that contains information on how the components should be wired together. In addition, FPGAs are completely reconfigurable and instantly take on a brand new “personality” when you recompile a different configuration of circuitry. In the past, FPGA technology was only available to engineers with a deep understanding of digital hardware design. The rise of high-level design tools, however, is changing the rules of FPGA programming, with new technologies that convert graphical block diagrams or even C code into digital hardware circuitry.

      FPGA chip adoption across all industries is driven by the fact that FPGAs combine the best parts of ASICs and processor-based systems. FPGAs provide hardware-timed speed and reliability, but they do not require high volumes to justify the large upfront expense of custom ASIC design. Reprogrammable silicon also has the same flexibility of software running on a processor-based system, but it is not limited by the number of processing cores available. Unlike processors, FPGAs are truly parallel in nature so different processing operations do not have to compete for the same resources. Each independent processing task is assigned to a dedicated section of the chip, and can function autonomously without any influence from other logic blocks. As a result, the performance of one part of the application is not affected when additional processing is added.

      The adoption of FPGA technology continues to increase as higher-level tools evolve to deliver the benefits of reprogrammable silicon to engineers and scientists of all expertise.
      Field-programmable gate array (FPGA) technology continues to gain momentum, and the worldwide FPGA market is expected to grow from $1.... more

      smorrisey

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      16 hours ago
    • Bad Bugs Get Trapped by NC State Textiles Researcher

      Flu season may be months away, but this North Carolina State University researcher has virus and bacteria on the run. He has developed a new way to trap and kill bacteria on masks and other fabric protective coverings.

      Flu season may be months away, but this North Carolina State University researcher has virus and bacteria on the run. He has develope... more

      jjwe

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      13 days ago
    • Kitty gets new leg/new lease on life

      Thanks to NC State University engineers and veterinarians, animals with missing limbs can get the latest in prosthetics--custom osseointegrated prosthetics that actually become part of the animal's native bone. The research may one day help soldiers and others with severe limb injury or amputations to have a more comfortable and stronger prosthetic limb replacement. Thanks to NC State University engineers and veterinarians, animals with missing limbs can get the latest in prosthetics--custom osseoi... more

      jjwe

      added this

      5 responses

      4 hours ago
    • Center for Work-Life Policy

      Women in science, engineering and technology careers abandon their careers early and in large numbers. Why? Read this short paragraph for free (and purchase the report if you want).

      VERY interesting.

      Women? Are you pissed off yet?
      Women in science, engineering and technology careers abandon their careers early and in large numbers. Why? Read this short paragraph ... more

      dkincheloe

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      9 hours ago
    • Next-generation chip design flow

      Digital and mixed-signal design flows demonstrate significant productivity gains through multiple projects taped out with an advanced electronic system level (ESL) flow.

      STMicroelectronics a global leader in providing semiconductor solutions across the spectrum of microelectronics applications, today announced the deployment
      of a certified electronic system level (ESL) System-on-Chip reference
      design flow.

      The design flow has been adopted and internally distributed following
      successful tape-outs of more than a dozen ASIC (application specific
      integrated circuit) designs with productivity gains from four to ten times
      faster than with traditional methods. Additionally, ST is also meeting
      increasing demands from industry leaders in consumer markets for complete
      system-level design platforms integrating digital and RF/mixed-signal
      technologies. A number of leading-edge ST products have been developed
      using this reference design flow, such as a 2-megapixel YUV CMOS image
      sensor and a highly-integrated image processing hardware accelerator for
      mobile phones.

      Aimed at complex designs for next-generation consumer electronics
      equipment, ST's integrated ESL reference-design flow for complex digital
      CMOS designs combines high-level synthesis, sequential equivalence
      checking, power exploration and lint checkers that look for errors in code
      construction, thereby providing a complete methodology from ANSI C++ to RTL
      including certified integration ST's certified RTL-to-GDS2 design flow. As
      a result, hardware designers using ST's ESL reference flow are able to
      create and verify chips faster, with higher quality.

      The advanced design flow is the result of more than three years of
      close collaboration with best-in-class EDA providers for each of the core
      ESL technologies. The ST design flow is integrated with Atrenta's
      industry-standard SpyGlass(R) for RTL lint checking and power analysis; the
      Mentor Graphics(R) Catapult(R) C Synthesis tool; and Calypto Design
      Systems' SLEC equivalence checker, providing highly efficient synthesis
      from pure ANSI C++ to RTL and formally verifying that the resulting RTL
      implementation is functionally correct. This advanced flow provides a
      comprehensive solution that includes: RTL lint sign-off; power estimation
      and exploration; C-to-C formal equivalence checking; C-to-RTL formal
      equivalence checking; SystemC model generation; and C-to-RTL high-level
      synthesis, thereby minimizing risk and shortening design cycles with
      'real-world' productivity gains of between four and ten times.

      Additionally, ST is successfully using its design and verification flow
      for RF/mixed-signal ICs to accelerate the development of sophisticated
      mixed-signal chipsets used in multi-band, multi-format wireless products.
      The RF/mixed-signal design flow is based on Agilent Technologies' Advanced
      Design System (ADS) software and Mentor Graphics' Catapult C synthesis
      technology.

      Optimized ANSI-C code, which describes the digital element of the chip,
      is used in Agilent's ADS platform to verify the RF/mixed-signal design
      performance against published wireless standards. Once verified, this same
      optimized ANSI-C is then input into Mentor's Catapult C compiler to create
      very high-speed integrated circuit hardware description language (VHDL)
      that is used for gate-level synthesis into an ASIC.

      "ST has developed one of the industry's most advanced system level
      design flows to manage the increasing complexity of today's System-on-Chip
      designs," said Philippe Magarshack, Vice-President and General Manager of
      Central CAD and Design Solutions at STMicroelectronics. "By integrating
      best-in-class tool technologies from Agilent, Atrenta, Calypto and Mentor
      with ST's own design expertise, our system-level design flows can build
      chips faster, with higher quality and productivity, allowing our customers
      to derive the maximum benefit from ST's advanced chip technologies."
      Digital and mixed-signal design flows demonstrate significant productivity gains through multiple projects taped out with an advanced ... more

      smorrisey

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      22 hours ago
    • Molecular Self-Assembly Explains Spread of Disease, Language, Humanity

      What do you get when a few chemical engineering professors study how layers of molecules grow? You get a theory of how diseases, languages and populations spread. Sounds like a leap? Not for Dr. Jan Genzer at NC State University. What do you get when a few chemical engineering professors study how layers of molecules grow? You get a theory of how diseases, lang... more

      jjwe

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      1 response

      24 days ago
    • Antimatter Beam Breaks Record - Not just for Captain Kirk Anymore

      This is the stuff of Star Trek...Beam me up, Scotty.

      jjwe

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      10 days ago
    • Nanofabric kills germs and defends against the elements

      It's always interesting when engineers play with atomic layer deposition and fibers. This new fabric, developed at NC State University, is antibacterial, antimicrobial and waterproof. It's always interesting when engineers play with atomic layer deposition and fibers. This new fabric, developed at NC State Universit... more

      jjwe

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      5 days ago
    • Press Button, Building Goes Down

      The computer modeling of building implosion accurately predicts the pattern of the actual building implosion. This modeling program was developed at NC State University. The computer modeling of building implosion accurately predicts the pattern of the actual building implosion. This modeling program w... more

      jjwe

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      1 response

      7 days ago
    • North Carolina State University :: A Marriage of Art and Engineering

      NC State University is rapidly becoming a leading educator of engineers and computer scientists in the area of gaming. Dr. Michael Young and his colleagues in the College of Engineering and the College of Design at NC State are collaborating to develop both serious games and computer games. NC State is also a leader in the development of high performance circuits and chip design. < http://www.engr.ncsu.edu/news/news_articles/franzon-chi...

      NC State University is rapidly becoming a leading educator of engineers and computer scientists in the area of gaming. Dr. Michael Yo... more

      jjwe

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      2 days ago
    • Supercomputer sets petaflop pace

      I work with Dr. Frank Mueller, associate professor of computer science at North Carolina State University, who built the first PS3 supercomputing cluster for academic applications back in January 2007. The cluster is being used as an education and research tool in NC State's College of Engineering. Here is the article announcing this first of its kind computing cluster capable of high performance scientific computing. (Go to the url to see a photo of Mueller and his cluster.)

      http://www.engr.ncsu.edu/news/news_articles/ps3.html

      February 19, 2007

      NC State Engineer Creates First Academic Playstation 3 Computing Cluster

      — Dr. Frank Mueller releases the power of the Playstation3 for science and education

      The Sony Playstation 3, Xbox and Nintendo Wii have captivated a generation of computer gamers with bold graphics and rapid-fire animation. Who could have guessed that these high-tech toys could do more than play games? At North Carolina State University, Dr. Frank Mueller imagined using the power of the new Sony Playstation 3 (PS3) to create a high-powered computing environment for a fraction of the cost of the supercomputers on the market.

      Mueller, an associate professor of computer science, has built a supercomputing cluster capable of both high-performance computing and running the latest in computer gaming. His cluster of eight Sony PS3 machines — the first such academic cluster in the world — packs the power of a small supercomputer, but at a total cost of about $5,000, it costs less than some desktop computers that have only a fraction of the computing power.

      “Clusters are not new to the computing world,” says Mueller. “Places like Google, the stock market, automotive design companies and scientists use clusters, but this is the first academic computing cluster built from Playstation 3s.”

      Go to url for the full story.

      I work with Dr. Frank Mueller, associate professor of computer science at North Carolina State University, who built the first PS3 sup... more

      jjwe

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      10 days ago
    • Supercomputer breaks warp speed limit

      An American military supercomputer, assembled from components originally designed for video game machines, has reached a long-sought-after computing milestone by processing more than 1.026 quadrillion calculations per second.

      The new machine is more than twice as fast as the previous fastest supercomputer, the IBM BlueGene/L, which is based at Lawrence Livermore National Laboratory in California.

      The new $133 million supercomputer, called Roadrunner in a reference to the state bird of New Mexico, was devised and built by engineers and scientists at IBM and Los Alamos National Laboratory, based in Los Alamos, New Mexico. It will be used principally to solve classified military problems to ensure that the nation's stockpile of nuclear weapons will continue to work correctly as they age. The Roadrunner will simulate the behavior of the weapons in the first fraction of a second during an explosion.

      Before it is placed in a classified environment, it will also be used to explore scientific problems like climate change. The greater speed of the Roadrunner will make it possible for scientists to test global climate models with higher accuracy.

      The high-performance computing goal, known as a petaflop — one thousand trillion calculations per second — has long been viewed as a crucial milestone by military, technical and scientific organizations in the United States, as well as a growing group including Japan, China and the European Union. All view supercomputing technology as a symbol of national economic competitiveness.

      By running programs that find a solution in hours or even less time — compared with as long as three months on older generations of computers — petaflop machines like Roadrunner have the potential to fundamentally alter science and engineering,

      The Roadrunner is based on a radical design that includes 12,960 chips that are an improved version of an IBM Cell microprocessor, a parallel processing chip originally created for Sony's PlayStation 3 video-game machine. The Sony chips are used as accelerators, or turbochargers, for portions of calculations

      Roadrunner, which consumes roughly three megawatts of power, or about the power required by a large suburban shopping center, requires three separate programming tools because it has three types of processors. Programmers have to figure out how to keep all of the 116,640 processor cores in the machine occupied simultaneously in order for it to run effectively.

      Many executives and scientists see Roadrunner as an example of the resurgence of the United States in supercomputing.

      By breaking the petaflop barrier sooner than had been generally expected, the United States' supercomputer industry has been able to sustain a pace of continuous performance increases, improving a thousandfold in processing power in 11 years. The next thousandfold goal is the exaflop, which is a quintillion calculations per second, followed by the zettaflop, the yottaflop and the xeraflop.
      An American military supercomputer, assembled from components originally designed for video game machines, has reached a long-sought-a... more

      smorrisey

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      21 hours ago
    • Shimano unveils the new Dura-Ace 7900

      This is total geek bike porn.

      I don't think I'll ever ride any Dura-Ace components, but they sure are good looking and (weight wise) next to nothing.

      Wow.

      "...The old 7800 series Dura-Ace has been in service in the professional peloton since 2003. It was released to the public as 2004 equipment and, although it wasn’t the first 10-speed group to market, it was trend-setting. Five years later, the 2009 redesign of Dura-Ace will set the stage for the brand's future and the Japanese giant took some inspiration from its competition..."
      This is total geek bike porn. ... more

      meligrosa

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      7 responses

      9 hours ago
    • Pie in the sky: The world's first edible high-rise

      Toronto scientist Gordon Graff has created plans for a 58-floor concept building - the SkyFarm - which would grow crops in the heart of the city and could provide enough food for 35,000 people every day. Toronto scientist Gordon Graff has created plans for a 58-floor concept building - the SkyFarm - which would grow crops in the heart o... more

      lecoke

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      2 responses

      19 days ago
    • american robots..

      i was sitting in the living room with my mom watching american idol for the first time since ruben won and noticed something was different....as i watched the crowd and the performances of the entertainers their movements started to become unhuman...as i started to question this feeling images of robots popped in my head...placed in rows in the crowd programed to simulate an audience...i noticed the hand claps never faltering to land right in front of each other...now i know that its the music thats suppose to be keeping the hands in rhythm but LOOK close and they begin to all look the same wherever they are whether in the air or around the waist its the same...and performances just look too staged too me...everything about that show just seems robotic...check this out for a feel of how far they show we have come http://youtube.com/watch?v=9vwZ5FQEUFg...http://youtube... s, http://youtube.com/watch?v=Q3C5sc8b3xM&feature=rela... these videos were added in 2006 we and technology is growing ever faster...COMMENT i was sitting in the living room with my mom watching american idol for the first time since ruben won and noticed something was diffe... more

      bdizzil216

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      5 responses

      1 day ago
    • Where art and engineering meet

      Theo Jensen, Kinetic sculptures are lyrical, inspirational...mesmerizing. And I have to say, I'm always a sucker for this kind of advertising...6 months later, and I remembered that BMW sponsored this guy! Theo Jensen, Kinetic sculptures are lyrical, inspirational...mesmerizing. And I have to say, I'm always a sucker for this kind of adv... more

      leahl

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      2 days ago
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Engineering

jjwe smorrisey Scott_Bromley kinolina bdizzil216 Ice_cream_Man themanwithadog sajh diode mirimysweet meligrosa Nawid J_Jammer khsing phillyharper mattbrawn Purdey 24French MissJonaLyn 1percent Dmitri_Molotov digitrash ArtLiquidBlogspot Raulek steadward Kabimbi heliarc Saladin _Hayko devo64 echoz cwc_agent spiral smittyforthskum Deamontooth Neghie zenfilm joshuaheller Vierotchka Justin_Gunn oracleruby halfstash blackdaylight jonbrooks ocanada marcozarco BenDorries nwillens justDre Darevalo